External Peripheral Interface Library

The External Peripheral Interface (EPI) is a high-speed parallel bus for external peripherals or memory. It has several modes of operation to interface gluelessly to many types of external devices.
The External Peripheral Interface is similar to a standard microprocessor address/data bus, except that it must typically be connected to just one type of external device.
Enhanced capabilities include uDMA support, clocking control and support for external FIFO buffers.

The mikroPascal PRO for ARM provides a library for working with External Peripheral Interface.

Library Routines

EPI_WorkaroundWordWrite

Prototype

procedure EPI_WorkaroundWordWrite(addr : ^dword; value : dword);
Description

This function writes a 32-bit value into external code address space.
Parameters
  • addr: destination address.
  • value: value to be written.
Returns

Nothing.
Requires

Nothing.
Notes

None.

EPI_WorkaroundWordRead

Prototype

function EPI_WorkaroundWordRead(addr : ^dword) : dword;
Description

This function reads a 32-bit value from external code address space.
Parameters
  • addr: source address.
Returns

A value read from the source address.
Requires

Nothing.
Notes

None.

EPI_WorkaroundHWordWrite

Prototype

procedure EPI_WorkaroundHWordWrite(addr : ^dword; value : word);
Description

This function writes a 16-bit value into external code address space.
Parameters
  • addr: destination address.
  • value: value to be written.
Returns

Nothing.
Requires

Nothing.
Notes

None.

EPI_WorkaroundHWordWriteArrayInc

Prototype

procedure EPI_WorkaroundHWordWriteArrayInc(dest : ^word; source : ^word; uicount : dword);
Description

This function writes an array of 16-bit values into external code address space.
The array is placed in natural (incremental) order - first element is written at the starting address set by the user.
Parameters
  • addr: starting destination address.
  • source: array to be written.
  • uicount: number of array elements to be written.
Returns

Nothing.
Requires

Nothing.
Notes

None.

EPI_WorkaroundHWordWriteArrayIncByStep

Prototype

procedure EPI_WorkaroundHWordWriteArrayIncByStep(dest : ^dword; source : ^dword; uicount : word; step : word);
Description

This function writes an array of 16-bit values into external code address space.
The array is placed in natural (incremental) order - first element is written at the starting address set by the user. The array elements are placed at the distances set by the step parameter.
Parameters
  • addr: starting destination address.
  • source: array to be written.
  • uicount: number of array elements to be written.
  • step: step in which array elements are written.
Returns

Nothing.
Requires

Nothing.
Notes

None.

EPI_WorkaroundHWordWriteArrayDec

Prototype

procedure EPI_WorkaroundHWordWriteArrayDec(dest : ^word; source : ^word; uicount : word);
Description

This function writes an array of 16-bit values into external code address space.
The array is placed in reversed (decremental) order - first element is placed at the ending address set by the user.
Parameters
  • addr: ending destination address.
  • source: array to be written.
  • uicount: number of array elements to be written.
Returns

Nothing.
Requires

Nothing.
Notes

None.

EPI_WorkaroundHWordWriteArrayDecByStep

Prototype

procedure EPI_WorkaroundHWordWriteArrayDecByStep(dest : ^word; source : ^dword; uicount : word; step : word);
Description

This function writes an array of 16-bit values into external code address space.
The array is placed in reversed (decremental) order - first element is placed at the ending address set by the user. The array elements are placed at the distances set by the step parameter.
Parameters
  • addr: ending destination address.
  • source: array to be written.
  • uicount: number of array elements to be written.
  • step: step in which array elements are written.
Returns

Nothing.
Requires

Nothing.
Notes

None.

EPI_WorkaroundHWordRead

Prototype

function EPI_WorkaroundHWordRead(addr : ^word): word;
Description

This function reads a 16-bit value from external code address space.
Parameters
  • addr: source address.
Returns

16-bit value from the source address.
Requires

Nothing.
Notes

None.

EPI_WorkaroundByteWrite

Prototype

procedure EPI_WorkaroundByteWrite(addr : ^byte; value : byte);
Description

This function writes an 8-bit value to external code address space.
Parameters
  • addr: destination address.
  • value: value to be written.
Returns

Nothing.
Requires

Nothing.
Notes

None.

EPI_WorkaroundByteRead

Prototype

function EPI_WorkaroundByteRead(addr : ^byte) : byte;
Description

This function reads a 8-bit value from external code address space.
Parameters
  • addr: source address.
Returns

8-bit value from the source address.
Requires

Nothing.
Notes

None.

EPI_ModeSet

Prototype

procedure EPI_ModeSet(mode : dword);
Description

This functions sets the operating mode of the EPI module.
Parameters
  • mode: usage mode of the EPI module. Valid values :
    Value Description
    _EPI_MODE_GENERAL Use for general-purpose mode operation.
    _EPI_MODE_SDRAM Use with SDRAM device.
    _EPI_MODE_HB8 Use with host-bus 8-bit interface.
    _EPI_MODE_HB16 Use with host-bus 16-bit interface.
    _EPI_MODE_DISABLE Disable the EPI module.
Returns

Nothing.
Requires

Nothing.
Notes

None.

EPI_DividerSet

Prototype

procedure EPI_DividerSet(divider : dword);
Description

This function sets the clock divider(s) that is used to determine the clock rate of the external interface.
Parameters
  • divider: the value of the clock divider to be applied to the external interface (0-65535).
Returns

Nothing.
Requires

Nothing.
Notes

None.

EPI_DividerCSSet

Prototype

procedure EPI_DividerCSSet(cs : dword; divider : dword);
Description

This function sets the clock divider(s) for the specified CS that is used to determine the clock rate of the external interface.
Parameters
  • cs: this is the chip select to modify and has a valid range of 0-3 the external interface (0-65535).
  • divider: value of the clock divider to be applied to the external interface (0-65535).
Returns

Nothing.
Requires

Nothing.
Notes

None.

EPI_DMATxCount

Prototype

procedure EPI_DMATxCount(count : dword);
Description

This function sets the transfer count for uDMA transmit operations on EPI. A non-zero transmit count in combination with a FIFO threshold trigger asserts an EPI uDMA transmit.
Parameters
  • count: number of units to transmit by uDMA to WRFIFO.
Returns

Nothing.
Requires

Nothing.
Notes

None.

EPI_ConfigSDRAMSet

Prototype

procedure EPI_ConfigSDRAMSet(config : dword; refresh : dword);
Description

This function is used to configure the SDRAM interface, when the SDRAM mode is chosen with the function EPI_ModeSet().
Parameters
  • config: SDRAM interface configuration. The parameter is the logical OR of several sets of choices:

    Processor Core Frequency

    Value The processor core frequency must be specified with one of the following:
    _EPI_SDRAM_CORE_FREQ_0_15 Defines core clock as 0 MHz < clk <= 15 MHz.
    _EPI_SDRAM_CORE_FREQ_15_30 Defines core clock as 15 MHz < clk <= 30 MHz.
    _EPI_SDRAM_CORE_FREQ_30_50 Defines core clock as 30 MHz < clk <= 50 MHz.
    _EPI_SDRAM_CORE_FREQ_50_100 defines core clock as 50 MHz < clk <= 100MHz.

    Power Mode

    Value The low power mode is specified with one of the following:
    _EPI_SDRAM_LOW_POWER Enter low power, self-refresh state.
    _EPI_SDRAM_FULL_POWER Normal operating state.

    SDRAM Size

    Value The SDRAM device size is specified with one of the following:
    _EPI_SDRAM_SIZE_64MBIT Size is a 64 Mbit device (8 MB).
    _EPI_SDRAM_SIZE_128MBIT Size is a 128 Mbit device (16 MB).
    _EPI_SDRAM_SIZE_256MBIT Size is a 256 Mbit device (32 MB).
    _EPI_SDRAM_SIZE_512MBIT Size is a 512 Mbit device (64 MB).
  • refresh: The refresh count in core clocks (0-2047).
Returns

Nothing.
Requires

Nothing.
Notes

None.

EPI_ConfigHB8Set

Prototype

procedure EPI_ConfigHB8Set(config : dword; maxWait : dword);
Description

Configures the interface for Host-bus 8 operation.
Parameters
  • config: The interface configuration. This parameter is the logical OR of the following:

    Host-bus 8 Submode

    Value Host-bus 8 submode, select one of:
    EPI_HB8_MODE_ADMUX Sets data and address muxed, AD[7:0]
    EPI_HB8_MODE_ADDEMUX Sets up data and address separate, D[7:0].
    EPI_HB8_MODE_SRAM As EPI_HB8_MODE_ADDEMUX, but uses address switch for multiple reads instead of OEn strobing, D[7:0].
    EPI_HB8_MODE_FIFO Adds XFIFO with sense of XFIFO full and XFIFO empty, D[7:0].
    EPI_HB8_USE_TXEMPTY Enables TXEMPTY signal with FIFO.
    EPI_HB8_USE_RXFULL Enables RXFULL signal with FIFO.
    EPI_HB8_WRHIGH Sets active high write strobe, otherwise it is active low.
    EPI_HB8_RDHIGH Sets active high read strobe, otherwise it is active low.

    Write Wait State

    Value Write wait state when EPI_HB8_BAUD is used, select one of:
    EPI_HB8_WRWAIT_0 Sets write wait state to 2 EPI clocks (default).
    EPI_HB8_WRWAIT_1 Sets write wait state to 4 EPI clocks.
    EPI_HB8_WRWAIT_2 Sets write wait state to 6 EPI clocks.
    EPI_HB8_WRWAIT_3 Sets write wait state to 8 EPI clocks.

    Read Wait State

    Value Read wait state when EPI_HB8_BAUD is used, select one of:
    EPI_HB8_RDWAIT_0 Sets read wait state to 2 EPI clocks (default).
    EPI_HB8_RDWAIT_1 Sets read wait state to 4 EPI clocks.
    EPI_HB8_RDWAIT_2 Sets read wait state to 6 EPI clocks.
    EPI_HB8_RDWAIT_3 Sets read wait state to 8 EPI clocks.

    Miscellaneous

    Value Description:
    EPI_HB8_WORD_ACCESS Use Word Access mode to route bytes to the correct byte lanes allowing data to be stored in bits [31:8].
    EPI_HB8_CLOCK_GATE_IDLE Sets the EPI clock to be held low when no data is available to read or write.
    EPI_HB8_CLOCK_INVERT Inverts the EPI clock.
    EPI_HB8_IN_READY_EN Sets EPIS032 as a ready/stall signal, active high.
    EPI_HB8_IN_READY_EN_INVERT Sets EPIS032 as ready/stall signal, active low.
    EPI_HB8_ALE_HIGH Sets the address latch active high (default).
    EPI_HB8_ALE_LOW Sets address latch active low.
    EPI_HB8_CSBAUD Use different baud rates when accessing devices on each.
Returns

Nothing.
Requires

Nothing.
Notes

None.

EPI_ConfigHB16Set

Prototype

procedure EPI_ConfigHB16Set(config : dword; maxWait : dword);
Description

This function sets the operating mode of the EPI module.
Parameters
  • config: interface configuration. This parameter is the logical OR of the following:

    Host-bus 16 Submode

    Value Host-bus 16 submode, select one of:
    EPI_HB16_MODE_ADMUX Sets data and address muxed, AD[15:0].
    EPI_HB16_MODE_ADDEMUX Sets up data and address as separate, D[15:0].
    EPI_HB16_MODE_SRAM Sets as EPI_HB16_MODE_ADDEMUX but uses address switch for multiple reads instead of OEn strobing, D[15:0].
    EPI_HB16_MODE_FIFO Addes XFIFO controls with sense of XFIFO full and XFIFO empty, D[15:0].

    Write Wait State

    Value Write wait state, select one of:
    EPI_HB16_WRWAIT_0 Sets write wait state to 2 EPI clocks.
    EPI_HB16_WRWAIT_1 Sets write wait state to 4 EPI clocks.
    EPI_HB16_WRWAIT_2 Sets write wait state to 6 EPI clocks.
    EPI_HB16_WRWAIT_3 Sets write wait state to 8 EPI clocks.

    Read Wait State

    Value Read wait state, select one of:
    EPI_HB16_RDWAIT_0 Sets read wait state to 2 EPI clocks.
    EPI_HB16_RDWAIT_1 Sets read wait state to 4 EPI clocks.
    EPI_HB16_RDWAIT_2 Sets read wait state to 6 EPI clocks.
    EPI_HB16_RDWAIT_3 Sets read wait state to 8 EPI clocks.

    Address Latch Logic

    Value Address latch logic, select one of:
    EPI_HB16_ALE_HIGH Sets the address latch active high (default).
    EPI_HB16_ALE_LOW Sets address latch active low.

    Chip Select Configuration

    Value Chip select configuration, select one of:
    EPI_HB8_CSCFG_CS Sets EPIS030 to operate as a chip select signal.
    EPI_HB8_CSCFG_ALE Sets EPIS030 to operate as an address latch.
    EPI_HB8_CSCFG_DUAL_CS Sets EPIS030/CS0n and EPIS027/CS1n with the asserted chip select.
    EPI_HB8_CSCFG_ALE_DUAL_CS Sets EPIS030 as ALE, EPIS027 as CS0n, and EPIS026 as CS1n.
    EPI_HB8_CSCFG_ALE_SINGLE_CS Sets EPIS030 to operate as ALE and EPIS027 is used as a chip select.
    EPI_HB8_CSCFG_QUAD_CS Sets EPIS030/CS0n, EPIS027/CS1n, EPIS034/CS2n and EPIS033/CS3n.
    EPI_HB8_CSCFG_ALE_QUAD_CS Sets EPIS030/ALE, EPIS026/CS0n, EPIS027/CS1n, EPIS034/CS2n and EPIS033/CS3n.

    Miscellaneous

    Value Description:
    EPI_HB16_WORD_ACCESS Sets Word Access mode .
    EPI_HB16_CLOCK_GATE_IDLE Holds the EPI clock low when no data is available.
    EPI_HB16_CLOCK_INVERT Inverts the EPI clock.
    EPI_HB16_IN_READY_EN Sets EPIS032 as a ready/stall signal, active high.
    EPI_HB16_IN_READY_EN_INVERTED Sets EPIS032 as a ready/stall signal, active low.
    EPI_HB16_BURST_TRAFFIC Enables burst traffic.
    EPI_HB16_BSEL Enables byte selects.
    EPI_HB16_CSBAUD Use different baud rates when accessing devices on each chip select.
  • maxWait: maximum number of external clocks to wait, if a FIFO ready signal is holding off the transaction, 0-255.
Returns

Nothing.
Requires

Nothing.
Notes

None.

EPI_ConfigHB8CSSet

Prototype

procedure EPI_ConfigHB8CSSet(cs : dword; config : dword);
Description

Sets the individual chip select configuration for the Host-bus 8 interface.
Parameters
  • cs: chip select value to configure. Valid values 0-3.
  • config: configuration settings. This parameter is the logical OR of the following:

    PHost-bus 8 Submode

    Value Host-bus 8 submode, select one of:
    EPI_HB8_MODE_ADMUX Sets data and address muxed, AD[7:0].
    EPI_HB8_MODE_ADDEMUX Sets up data and address separate, D[7:0].
    EPI_HB8_MODE_SRAM As EPI_HB8_MODE_ADDEMUX, but uses address switch for multiple reads instead of OEn strobing, D[7:0].
    EPI_HB8_MODE_FIFO Adds XFIFO with sense of XFIFO full and XFIFO empty, D[7:0].

    Write Wait State

    Value Write wait state when EPI_HB8_BAUD is used, select one of:
    EPI_HB8_WRWAIT_0 Sets write wait state to 2 EPI clocks (default).
    EPI_HB8_WRWAIT_1 Sets write wait state to 4 EPI clocks.
    EPI_HB8_WRWAIT_2 Sets write wait state to 6 EPI clocks.
    EPI_HB8_WRWAIT_3 Sets write wait state to 8 EPI clocks.

    Read wait state

    Value Read wait state when EPI_HB8_BAUD is used, select one of:
    EPI_HB8_RDWAIT_0 Sets read wait state to 2 EPI clocks (default).
    EPI_HB8_RDWAIT_1 Sets read wait state to 4 EPI clocks.
    EPI_HB8_RDWAIT_2 Sets read wait state to 6 EPI clocks.
    EPI_HB8_RDWAIT_3 Sets read wait state to 8 EPI clocks.

    Miscellaneous

    Value Description:
    EPI_HB8_WRHIGH Sets active high write strobe, otherwise it is active low.
    EPI_HB8_RDHIGH Sets active high read strobe, otherwise it is active low.
    EPI_HB8_ALE_HIGH Sets the address latch active high (default).
    EPI_HB8_ALE_LOW Sets address latch active low.
Returns

Nothing.
Requires

Nothing.
Notes

None.

EPI_ConfigHB16CSSet

Prototype

procedure EPI_ConfigHB16CSSet(cs : dword; config : dword);
Description

Sets the individual chip select configuration for the Host-bus 16 interface.
Parameters
  • cs: chip select value to configure, valid range of 0-3.
  • config: usage mode of the EPI module. This parameter is the logical OR of the following:

    Host-bus 16 Submode

    Value Host-bus 16 submode, select one of:
    EPI_HB16_MODE_ADMUX Sets data and address muxed, AD[15:0].
    EPI_HB16_MODE_ADDEMUX Sets up data and address separate, D[15:0].
    EPI_HB16_MODE_SRAM Same as EPI_HB8_MODE_ADDEMUX, but uses address switch for multiple reads instead of OEn strobing, D[15:0].
    EPI_HB16_MODE_FIFO Adds XFIFO with sense of XFIFO full and XFIFO empty, D[15:0].

    Write Wait State

    Value Write wait state when EPI_HB16_BAUD is used, select one of:
    EPI_HB16_WRWAIT_0 Sets write wait state to 2 EPI clocks (default).
    EPI_HB16_WRWAIT_1 Sets write wait state to 4 EPI clocks.
    EPI_HB16_WRWAIT_2 Sets write wait state to 6 EPI clocks.
    EPI_HB16_WRWAIT_3 Sets write wait state to 8 EPI clocks.

    Rrite Wait State

    Value Read wait state when EPI_HB16_BAUD is used, select one of:
    EPI_HB16_RDWAIT_0 Sets read wait state to 2 EPI clocks (default).
    EPI_HB16_RDWAIT_1 Sets read wait state to 4 EPI clocks.
    EPI_HB16_RDWAIT_2 Sets read wait state to 6 EPI clocks.
    EPI_HB16_RDWAIT_3 Sets read wait state to 8 EPI clocks.

    Miscellaneous

    Value Description:
    EPI_HB16_WRHIGH Sets active high write strobe, otherwise it is active low.
    EPI_HB16_RDHIGH Sets active high read strobe, otherwise it is active low.
    EPI_HB16_ALE_HIGH Sets the address latch active high (default).
    EPI_HB16_ALE_LOW Sets address latch active low.
    EPI_HB16_BURST_TRAFFIC Enables burst traffic.
Returns

Nothing.
Requires

Nothing.
Notes

None.

EPI_ConfigHB8TimingSet

Prototype

procedure EPI_ConfigHB8TimingSet(cs : dword; config : dword);
Description

Sets the individual chip select timing settings for the Host-bus 8 interface.
Parameters
  • cs: specifies the chip select to configure and has a valid range of 0-3.
  • config: configuration settings. This parameter is the logical OR of the following:

    Input Ready Stall Delay

    Value Input ready stall delay, select one of:
    EPI_HB8_IN_READY_DELAY_1 Sets the stall on input ready (EPIS032) to start 1 EPI clock after signaled.
    EPI_HB8_IN_READY_DELAY_2 Sets the stall on input ready (EPIS032) to start 2 EPI clocks after signaled.
    EPI_HB8_IN_READY_DELAY_3 Sets the stall on input ready (EPIS032) to start 3 EPI clocks after signaled.

    Host Bus Transfer Delay

    Value Host bus transfer delay, select one of:
    EPI_HB8_CAP_WIDTH_1 Defines the inter-transfer capture width to create a delay of 1 EPI clock.
    EPI_HB8_CAP_WIDTH_2 Defines the inter-transfer capture width to create a delay of 2 EPI clocks.

    Read/Write State Reduction

    Value Description:
    EPI_HB8_WRWAIT_MINUS_DISABLE Disables the additional write wait state reduction.
    EPI_HB8_WRWAIT_MINUS_ENABLE Enables a 1 EPI clock write wait state reduction.
    EPI_HB8_RDWAIT_MINUS_DISABLE Disables the additional read wait state reduction.
    EPI_HB8_RDWAIT_MINUS_ENABLE Enables a 1 EPI clock read wait state reduction.
Returns

Nothing.
Requires

Nothing.
Notes

None.

EPI_ConfigHB16TimingSet

Prototype

procedure EPI_ConfigHB16TimingSet(cs : dword; config : dword);
Description

Sets the individual chip select timing settings for the Host-bus 16 interface.
Parameters
  • cs: chip select value to configure.
  • config: configuration settings. This parameter is the logical OR of the following:

    Input Ready Stall Delay

    Value Input ready stall delay, select one of:
    EPI_HB16_IN_READY_DELAY_1 Sets the stall on input ready (EPIS032) to start 1 EPI clock after signaled.
    EPI_HB16_IN_READY_DELAY_2 Sets the stall on input ready (EPIS032) to start 2 EPI clocks after signaled.
    EPI_HB16_IN_READY_DELAY_3 Sets the stall on input ready (EPIS032) to start 3 EPI clocks after signaled.

    PSRAM Size Limitation

    Value PSRAM size limitation, select one of:
    EPI_HB16_PSRAM_NO_LIMIT Defines no row size limitation.
    EPI_HB16_PSRAM_128 Defines the PSRAM row size to 128 bytes.
    EPI_HB16_PSRAM_256 Defines the PSRAM row size to 256 bytes.
    EPI_HB16_PSRAM_512 Defines the PSRAM row size to 512 bytes.
    EPI_HB16_PSRAM_1024 Defines the PSRAM row size to 1024 bytes.
    EPI_HB16_PSRAM_2048 Defines the PSRAM row size to 2048 bytes.
    EPI_HB16_PSRAM_4096 Defines the PSRAM row size to 4096 bytes.
    EPI_HB16_PSRAM_8192 Defines the PSRAM row size to 8192 bytes.

    Host Bus Transfer Delay

    Value Host bus transfer delay, select one of:
    EPI_HB16_CAP_WIDTH_1 Defines the inter-transfer capture width to create a delay of 1 EPI clock.
    EPI_HB16_CAP_WIDTH_2 Defines the inter-transfer capture width to create a delay of 2 EPI clocks.

    Power Mode

    Value Write wait state timing reduction, select one of:
    EPI_HB16_WRWAIT_MINUS_DISABLE Disables the additional write wait state reduction.
    EPI_HB16_WRWAIT_MINUS_ENABLE Enables a 1 EPI clock write wait state reduction.

    Read Wait State Timing Reduction

    Value Read wait state timing reduction, select one of:
    EPI_HB16_RDWAIT_MINUS_DISABLE Disables the additional read wait state reduction.
    EPI_HB16_RDWAIT_MINUS_ENABLE Enables a 1 EPI clock read wait state reduction.
Returns

Nothing.
Requires

Nothing.
Notes

None.

EPI_PSRAMConfigRegSet

Prototype

procedure EPI_PSRAMConfigRegSet(cs : dword; cr : dword);
Description

Sets the PSRAM configuration register.
Parameters
  • cs: chip select target, valid values 0-3.
  • cr: PSRAM configuration register value.
Returns

Nothing.
Requires

Nothing.
Notes

None.

EPI_PSRAMConfigRegRead

Prototype

procedure EPI_PSRAMConfigRegRead(cs : dword);
Description

Requests a configuration register read from the PSRAM.
Parameters
  • cs: chip select target, valid values 0-3.
Returns

Nothing.
Requires

Nothing.
Notes

None.

EPI_PSRAMConfigRegGetNonBlocking

Prototype

function EPI_PSRAMConfigRegGetNonBlocking(cs : dword; cr : ^dword) : byte;
Description

Retrieves the contents of the EPI PSRAM configuration register.
Parameters
  • cs: chip select target, valid values 0-3.
  • cr: provided storage used to hold the register value.
Returns
  • 1 - if the value was copied to the provided storage.
  • 0 - if it was not.
Requires

Nothing.
Notes

None.

EPI_PSRAMConfigRegGet

Prototype

function EPI_PSRAMConfigRegGet(cs : dword) : dword;
Description

Retrieves the contents of the EPI PSRAM configuration register.
Parameters
  • cs: chip select target, valid values 0-3.
Returns

EPI PSRAM configuration register contents. Only the lower 16 bits are valid on a read.
Requires

Nothing.
Notes

None.

EPI_ConfigGPModeSet

Prototype

procedure EPI_ConfigGPModeSet(config : dword; frameCount : dword; maxWait : dword);
Description

Configures the interface for general-purpose mode operation.
Parameters
  • config: interface configuration. This parameter is the logical OR of the following:

    Address Bus Size

    Value Address bus size, select one of:
    EPI_GPMODE_ASIZE_NONE Sets no address bus.
    EPI_GPMODE_ASIZE_4 Sets an address bus size of 4 bits.
    EPI_GPMODE_ASIZE_12 Sets an address bus size of 12 bits.
    EPI_GPMODE_ASIZE_20 Sets an address bus size of 20 bits.

    Data Bus Size

    Value Data bus size, select one of:
    EPI_GPMODE_DSIZE_8 Sets a data bus size of 8 bits.
    EPI_GPMODE_DSIZE_16 Sets a data bus size of 16 bits.
    EPI_GPMODE_DSIZE_24 Sets a data bus size of 24 bits.
    EPI_GPMODE_DSIZE_32 Sets a data bus size of 32 bits.

    Miscellaneous

    Value Description:
    EPI_GPMODE_CLKPIN Interface clock as output on a pin.
    EPI_GPMODE_CLKGATE Clock is stopped when there is no transaction, otherwise it is free-running.
    EPI_GPMODE_RDYEN The external peripheral drives an iRDY signal into pin EPI0S27.
    EPI_GPMODE_FRAMEPIN Framing signal is emitted on a pin.
    EPI_GPMODE_FRAME50 Framing signal is 50/50 duty cycle, otherwise it is a pulse
    EPI_GPMODE_WRITE2CYCLE Two-cycle write is used, otherwise a single-cycle write is used.
    EPI_GPMODE_READ2CYCLE Two-cycle read is used, otherwise a single-cycle read is used.
  • frameCount: frame size in clocks, if the frame signal is used (0-15).
  • maxWait: maximum number of external clocks to wait when the external clock enable is holding off the transaction (0-255).
Returns

Nothing.
Requires

Nothing.
Notes

None.

EPI_AddressMapSet

Prototype

procedure EPI_AddressMapSet(map : dword);
Description

Configures the address map for the external interface.
Parameters
  • map: address mapping configuration. This parameter is the logical OR of the following:

    Peripheral Address Space Size

    Value Peripheral address space size, select one of:
    EPI_ADDR_PER_SIZE_256B Sets the peripheral address space to 256 bytes.
    EPI_ADDR_PER_SIZE_64KB Sets the peripheral address space to 64 Kbytes.
    EPI_ADDR_PER_SIZE_16MB Sets the peripheral address space to 16 Mbytes.
    EPI_ADDR_PER_SIZE_256MB Sets the peripheral address space to 256 Mbytes.

    Peripheral Base Address

    Value Peripheral base address, select one of:
    EPI_ADDR_PER_BASE_NONE Sets the peripheral base address to none.
    EPI_ADDR_PER_BASE_A Sets the peripheral base address to 0xA0000000.
    EPI_ADDR_PER_BASE_C Sets the peripheral base address to 0xC0000000.

    RAM Address Space

    Value RAM address space, select one of:
    EPI_ADDR_RAM_SIZE_256B Sets the RAM address space to 256 bytes.
    EPI_ADDR_RAM_SIZE_64KB Sets the RAM address space to 64 Kbytes.
    EPI_ADDR_RAM_SIZE_16MB Sets the RAM address space to 16 Mbytes.
    EPI_ADDR_RAM_SIZE_256MB Sets the RAM address space to 256 Mbytes.

    RAM Base Address

    Value RAM base address, select one of:
    EPI_ADDR_RAM_BASE_NONE Sets the RAM space address to none.
    EPI_ADDR_RAM_BASE_6 Sets the RAM space address to 0x60000000.
    EPI_ADDR_RAM_BASE_8 Sets the RAM space address to 0x80000000.

    External Code

    Value Description:
    EPI_ADDR_RAM_QUAD_MODE Maps CS0n to 0x60000000, CS1n to 0x80000000, CS2n to 0xA0000000, and CS3n to 0xC0000000.
    EPI_ADDR_CODE_SIZE_256B Sets an external code size of 256 bytes, range 0x00 to 0xFF.
    EPI_ADDR_CODE_SIZE_64KB Sets an external code size of 64 Kbytes, range 0x0000 to 0xFFFF.
    EPI_ADDR_CODE_SIZE_16MB Sets an external code size of 16 Mbytes, range 0x000000 to 0xFFFFFF.
    EPI_ADDR_CODE_SIZE_256MB Sets an external code size of 256 Mbytes, range 0x0000000 to 0xFFFFFFF.
    EPI_ADDR_CODE_BASE_NONE Sets external code base to not mapped.
    EPI_ADDR_CODE_BASE_1 Sets external code base to 0x10000000.
Returns

Nothing.
Requires

Nothing.
Notes

None.

EPI_NonBlockingReadConfigure

Prototype

procedure EPI_NonBlockingReadConfigure(channel : dword; dataSize : dword; address : dword);
Description

Configures a non-blocking read transaction.
Parameters
  • channel: read channel (0 or 1).
  • dataSize: size of the data items to read. Valid values :
    Value Description
    EPI_NBCONFIG_SIZE_8 8-bit data transfers.
    EPI_NBCONFIG_SIZE_16 16-bit data transfers.
    EPI_NBCONFIG_SIZE_32 32-bit data transfers.
  • address: starting address to read.
Returns

Nothing.
Requires

Nothing.
Notes

None.

EPI_NonBlockingReadStart

Prototype

procedure EPI_NonBlockingReadStart(channel : dword; count : dword);
Description

Starts a non-blocking read transaction. Once this function is called, the EPI module begins reading data from the external device into the read FIFO.
Parameters
  • channel: read channel (0 or 1).
  • count: number of items to read (1-4095).
Returns

Nothing.
Requires

Nothing.
Notes

None.

EPI_NonBlockingReadStop

Prototype

procedure EPI_NonBlockingReadStop(channel : dword);
Description

This function cancels a non-blocking read transaction that is already in progress.
Parameters
  • channel: read channel (0 or 1).
Returns

Nothing.
Requires

Nothing.
Notes

None.

EPI_NonBlockingReadCount

Prototype

function EPI_NonBlockingReadCount(channel : dword) : dword;
Description

This function gets the remaining count of items for a non-blocking read transaction.
Parameters
  • channel: read channel (0 or 1).
Returns

The number of items remaining in the non-blocking read transaction.
Requires

Nothing.
Notes

None.

EPI_NonBlockingReadAvail

Prototype

function EPI_NonBlockingReadAvail() : dword;
Description

This function gets the number of items that are available to read in the read FIFO.
Parameters

None.
Returns

The number of items available to read in the read FIFO.
Requires

Nothing.
Notes

None.

EPI_NonBlockingReadGet32

Prototype

function EPI_NonBlockingReadGet32(count : dword; buf : ^dword) : dword;
Description

Read available data from the read FIFO, as 32-bit data items.
Parameters
  • count: maximum count of items to read.
  • buf: caller supplied buffer where the read data should be stored.
Returns

The number of items read from the FIFO.
Requires

Nothing.
Notes

None.

EPI_NonBlockingReadGet16

Prototype

function EPI_NonBlockingReadGet16(count : dword; buf : ^dword) : dword;
Description

Read available data from the read FIFO, as 16-bit data items.
Parameters
  • count: maximum count of items to read.
  • buf: caller supplied buffer where the read data should be stored.
Returns

The number of items read from the FIFO.
Requires

Nothing.
Notes

None.

EPI_NonBlockingReadGet8

Prototype

function EPI_NonBlockingReadGet8(count : dword; buf : ^dword) : dword;
Description

Read available data from the read FIFO, as 8-bit data items.
Parameters
  • count: maximum count of items to read.
  • buf: caller supplied buffer where the read data should be stored.
Returns

The number of items read from the FIFO.
Requires

Nothing.
Notes

None.

EPI_FIFOConfig

Prototype

procedure EPI_FIFOConfig(config : dword);
Description

This function configures the FIFO trigger levels and error generation.
Parameters
  • config: FIFO configuration. This parameter is the logical OR of the following:

    FIFO TX Trigger Level

    Value FIFO TX trigger level, select one of:
    EPI_FIFO_CONFIG_TX_EMPTY Sets the FIFO TX trigger level to empty.
    EPI_FIFO_CONFIG_TX_1_4 Sets the FIFO TX trigger level to 1/4.
    EPI_FIFO_CONFIG_TX_1_2 Sets the FIFO TX trigger level to 1/2.
    EPI_FIFO_CONFIG_TX_3_4 Sets the FIFO TX trigger level to 3/4.

    FIFO RX Trigger Level

    Value FIFO RX trigger level, select one of:
    EPI_FIFO_CONFIG_RX_1_8 Sets the FIFO RX trigger level to 1/8.
    EPI_FIFO_CONFIG_RX_1_4 Sets the FIFO RX trigger level to 1/4.
    EPI_FIFO_CONFIG_RX_1_2 Sets the FIFO RX trigger level to 1/2.
    EPI_FIFO_CONFIG_RX_3_4 Sets the FIFO RX trigger level to 3/4.
    EPI_FIFO_CONFIG_RX_7_8 Sets the FIFO RX trigger level to 7/8.
    EPI_FIFO_CONFIG_RX_FULL Sets the FIFO RX trigger level to full.

    Error Interrupt

    Value Error Interrupt
    EPI_FIFO_CONFIG_WTFULLERR Enables an error interrupt when a write is attempted and the write FIFO is full.
    EPI_FIFO_CONFIG_RSTALLERR Enables an error interrupt when a read is stalled due to an interleaved write or other reason.
Returns

Nothing.
Requires

Nothing.
Notes

None.

EPI_WriteFIFOCountGet

Prototype

function EPI_WriteFIFOCountGet() : dword;
Description

Reads the number of empty slots in the write transaction FIFO.
Parameters

Nothing.
Returns

The number of empty slots in the transaction FIFO.
Requires

Nothing.
Notes

None.

EPI_IntEnable

Prototype

procedure EPI_IntEnable(intFlags : dword);
Description

Enables EPI interrupt sources.
Parameters
  • intFlags: is a bit mask of the interrupt sources to be enabled. This parameter is the logical OR of the following:
    Value Description
    EPI_INT_TXREQ Interrupt when transmit FIFO is below the trigger level.
    EPI_INT_RXREQ Interrupt when read FIFO is above the trigger level.
    EPI_INT_ERR Interrupt when an error condition occurrs.
    EPI_INT_DMA_TX_DONE Interrupt when the transmit DMA completes.
    EPI_INT_DMA_RX_DONE Interrupt when the read DMA completes.
Returns

None.
Requires

Nothing.
Notes

None.

EPI_IntDisable

Prototype

procedure EPI_IntDisable(intFlags : dword);
Description

Disables EPI interrupt sources.
Parameters
  • intFlags: is a bit mask of the interrupt sources to be disabled. This parameter is the logical OR of the following:
    Value Description
    EPI_INT_TXREQ Interrupt when transmit FIFO is below the trigger level.
    EPI_INT_RXREQ Interrupt when read FIFO is above the trigger level.
    EPI_INT_ERR Interrupt when an error condition occurrs.
    EPI_INT_DMA_TX_DONE Interrupt when the transmit DMA completes.
    EPI_INT_DMA_RX_DONE Interrupt when the read DMA completes.
Returns

None.
Requires

Nothing.
Notes

None.

EPI_IntStatus

Prototype

function EPI_IntStatus(bMasked : byte) : dword;
Description

Gets the EPI interrupt status.
Parameters
  • bMasked: set 1 to get the masked interrupt status, or 0 to get the raw interrupt status.
Returns

  • Returns the masked or raw EPI interrupt status, as a bit field of any of the following values:

    Value Description
    EPI_INT_TXREQ Interrupt when transmit FIFO is below the trigger level.
    EPI_INT_RXREQ Interrupt when read FIFO is above the trigger level.
    EPI_INT_ERR Interrupt when an error condition occurrs.
    EPI_INT_DMA_TX_DONE Interrupt when the transmit DMA completes.
    EPI_INT_DMA_RX_DONE Interrupt when the read DMA completes.
Requires

Nothing.
Notes

None.

EPI_IntErrorStatus

Prototype

function EPI_IntErrorStatus(bMasked : byte) : dword;
Description

Gets the EPI error interrupt status.
Parameters

    None.
Returns

  • Returns a bit mask of error flags, which can be the logical OR of any of the following:

    Value Description
    EPI_INT_ERR_WTFULL Occurs when a write stalled when the transaction FIFO was full.
    EPI_INT_ERR_RSTALL Occurs when a read stalled.
    EPI_INT_ERR_TIMEOUT Occurs when the external clock enable held off a transaction longer than the configured maximum wait time.
Requires

Nothing.
Notes

None.

EPI_IntErrorClear

Prototype

procedure EPI_IntErrorClear(errFlags : dword);
Description

Clears pending EPI error sources.
Parameters
  • errFlags: is a bit mask of the error sources to be cleared. This parameter is the logical OR of the following:
    Value Description
    EPI_INT_ERR_DMAWRIC Clears the EPI_INT_DMA_TX_DONE as an interrupt source.
    EPI_INT_ERR_DMARDIC Clears the EPI_INT_DMA_RX_DONE as an interrupt source.
    EPI_INT_ERR_WTFULL Occurs when a write stalled when the transaction FIFO was full.
    EPI_INT_ERR_RSTALL Occurs when a read stalled.
    EPI_INT_ERR_TIMEOUT Occurs when the external clock enable held off a transaction longer than the configured maximum wait time.
Returns

None.
Requires

Nothing.
Notes

None.

EPI_SDRAM_Init

Prototype

procedure EPI_SDRAM_Init();
Description

Initialize SDRAM interface with default settings :

  • Normal operating state,
  • SDRAM size 64 Mbit (8 MB),
  • External code size 16 MB,
  • Mapping for the external code area starts at 0x1000.0000,
  • Read size value is 16-bits.
Parameters

None.
Returns

None.
Requires

Nothing.
Notes

None.

EPI_SDRAM_Init_Advanced

Prototype

procedure EPI_SDRAM_Init_Advanced(sdramConf : dword; addressConf : dword; readSize : dword);
Description

Initialize SDRAM interface with advanced settings.
Parameters
  • sdramConf: config parameter for EPI SDRAM. The parameter is the logical OR of several sets of choices :

    Processor Core Frequency

    Value The processor core frequency must be specified with one of the following:
    _EPI_SDRAM_CORE_FREQ_0_15 Defines core clock as 0 MHz < clk <= 15 MHz.
    _EPI_SDRAM_CORE_FREQ_15_30 Defines core clock as 15 MHz < clk <= 30 MHz.
    _EPI_SDRAM_CORE_FREQ_30_50 Defines core clock as 30 MHz < clk <= 50 MHz.
    _EPI_SDRAM_CORE_FREQ_50_100 defines core clock as 50 MHz < clk <= 100MHz.

    Power Mode

    Value The low power mode is specified with one of the following:
    _EPI_SDRAM_LOW_POWER Enter low power, self-refresh state.
    _EPI_SDRAM_FULL_POWER Normal operating state.

    SDRAM Size

    Value The SDRAM device size is specified with one of the following:
    _EPI_SDRAM_SIZE_64MBIT Size is a 64 Mbit device (8 MB).
    _EPI_SDRAM_SIZE_128MBIT Size is a 128 Mbit device (16 MB).
    _EPI_SDRAM_SIZE_256MBIT Size is a 256 Mbit device (32 MB).
    _EPI_SDRAM_SIZE_512MBIT Size is a 512 Mbit device (64 MB).

  • addressConf: Config parameter for Address. The parameter is the logical OR of several sets of choices :

    External Peripheral Size

    Value This field selects the size of the external peripheral.
    _EPI_ADDR_PER_SIZE_256B 256 bytes; lower address range: 0x00 to 0xFF.
    _EPI_ADDR_PER_SIZE_64KB 64 KB; lower address range: 0x0000 to 0xFFFF
    _EPI_ADDR_PER_SIZE_16MB 16 MB; lower address range: 0x00.0000 to 0xFF.FFFF
    _EPI_ADDR_PER_SIZE_256MB 256 MB; lower address range: 0x000.0000 to 0xFFF.FFFF

    External Peripheral Address

    Value This field selects address mapping for the external peripheral area.
    _EPI_ADDR_PER_BASE_NONE Not mapped.
    _EPI_ADDR_PER_BASE_A At 0xA000.0000.
    _EPI_ADDR_PER_BASE_C At 0xC000.0000.

    External RAM Size

    Value This field selects the size of mapped RAM.
    _EPI_ADDR_RAM_SIZE_256B 256 bytes; lower address range: 0x00 to 0xFF.
    _EPI_ADDR_RAM_SIZE_64KB S64 KB; lower address range: 0x0000 to 0xFFFF.
    _EPI_ADDR_RAM_SIZE_16MB 16 MB; lower address range: 0x00.0000 to 0xFF.FFFF.
    _EPI_ADDR_RAM_SIZE_256MB 256 MB; lower address range: 0x000.0000 to 0xFFF.FFFF.

    External RAM Address

    Value This field selects address mapping for external RAM area.
    _EPI_ADDR_RAM_BASE_NONE Not mapped.
    _EPI_ADDR_RAM_BASE_6 At 0x6000.0000.
    _EPI_ADDR_RAM_BASE_8 At 0x8000.0000.

    Quad Chip Select Mode

    Value Description :
    _EPI_ADDR_QUAD_MODE Only to be used with Host Bus quad chip select. In quad chip select mode,
    CS0n maps to 0x6000.0000, CS1n to 0x8000.0000, CS2n to 0xA000.0000 and CS3n maps to 0xC000.0000.

    External Code Size

    Value This field selects the size of the external code.
    _EPI_ADDR_CODE_SIZE_256B 256 bytes; lower address range: 0x00 to 0xFF.
    _EPI_ADDR_CODE_SIZE_64KB 64 KB; lower address range: 0x0000 to 0xFFFF
    _EPI_ADDR_CODE_SIZE_16MB 16 MB; lower address range: 0x00.0000 to 0xFF.FFFF
    _EPI_ADDR_CODE_SIZE_256MB 256 MB; lower address range: 0x000.0000 to 0xFFF.FFFF

    External Code Address

    Value This field selects address mapping for the external code area.
    _EPI_ADDR_CODE_BASE_NONE Not mapped.
    _EPI_ADDR_CODE_BASE_1 At 0x1000.0000.

  • readSize: selects the size of transactions when performing non-blocking reads. Valid values :
    Value Description :
    _EPI_READ_SIZE_BYTE Size is a 64 Mbit device (8 MB).
    _EPI_READ_SIZE_HALF_WORD Size is a 128 Mbit device (16 MB).
    _EPI_READ_SIZE_WORD Size is a 128 Mbit device (16 MB).
Returns

None.
Requires

Nothing.
Notes

None.

EPI_SDRAM_Write

Prototype

function EPI_SDRAM_Write(wBuff : ^word; count : dword; address : dword) : dword;
Description

Write data to SDRAM.
Parameters
  • wBuff: data buffer to write.
  • count: number of elements to write.
  • address: starting address of writing operation.
Returns

Number of elements wrritten in SDRAM.
Requires

Nothing.
Notes

None.

EPI_SDRAM_NonBlockingReadConfig

Prototype

procedure EPI_SDRAM_NonBlockingReadConfig(dataSize : dword; address : dword);
Description

This function is used to configure a non-blocking read channel for a transaction. Two channels are available which can be used in a ping-pong method for continuous reading.
It is not necessary to use both channels to perform a non-blocking read.

Once configured, the non-blocking read is started by calling EPI_SDRAM_NonBlockingReadStart(). If the addresses to be read from the device are in a sequence,
it is not necessary to call this function multiple times. Until it is changed, the EPI module stores the last address that was used for a non-blocking read (per channel).
Parameters
  • dataSize: size of the data items to read. Valid values :
    Value Description
    EPI_NBCONFIG_SIZE_8 8-bit data transfers.
    EPI_NBCONFIG_SIZE_16 16-bit data transfers.
    EPI_NBCONFIG_SIZE_32 32-bit data transfers.
  • address: starting address to read, relative to the external device. The start of the device is address 0.
Returns

Nothing.
Requires

Nothing.
Notes

None.

EPI_SDRAM_NonBlockingReadStart

Prototype

procedure EPI_SDRAM_NonBlockingReadStart(dataCount : dword);
Description

This function starts a non-blocking read that was previously configured with the function EPI_SDRAM_NonBlockingReadConfig().
Once this function is called, the EPI module begins reading data from the external device into the read FIFO.

The EPI stops reading when the FIFO fills up and resumes reading when the application drains the FIFO,
until the total specified count of data items has been read.

Once a read transaction is completed and the FIFO drained, another transaction can be started from the next address by calling this function again.
Parameters
  • dataCount: number of items to read (1-4095).
Returns

Nothing.
Requires

Nothing.
Notes

None.

EPI_SDRAM_NonBlockingReadStop

Prototype

procedure EPI_SDRAM_NonBlockingReadStop();
Description

This function cancels a non-blocking read transaction that is already in progress.
Parameters

None.
Returns

Nothing.
Requires

Nothing.
Notes

None.

EPI_SDRAM_NonBlockingReadGet

Prototype

function EPI_SDRAM_NonBlockingReadGet(readType : dword; count : dword; buff : ^word) : dword;
Description

This function start an EPI SDRAM non-blocking read operation.
Parameters
  • readType: size of the data to be read with non-blocking operation.
  • count: the maximum count of items to read
  • buff: the caller-supplied buffer where the read data should be stored.
Returns

Number of items read from the FIFO.
Requires

Nothing.
Notes

None.